what is Channel length modulation?

2 Answers   Intel,

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Implement an Inverter using a single transistor?

4 Answers   Intel,

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Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

0 Answers  

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What happens to delay if you increase load capacitance?

3 Answers   Infosys,

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What products have you designed which have entered high volume production?

1 Answers   Intel,

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Explain what is scr (silicon controlled rectifier)?

0 Answers  

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What is the ideal input and output resistance of a current source?

0 Answers  

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Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

1 Answers   Intel,

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What are the different gates where boolean logic are applicable?

0 Answers  

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Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)

6 Answers  

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What is clock feed through?

2 Answers   Intel,

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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