Golgappa.net | Golgappa.org | BagIndia.net | BodyIndia.Com | CabIndia.net | CarsBikes.net | CarsBikes.org | CashIndia.net | ConsumerIndia.net | CookingIndia.net | DataIndia.net | DealIndia.net | EmailIndia.net | FirstTablet.com | FirstTourist.com | ForsaleIndia.net | IndiaBody.Com | IndiaCab.net | IndiaCash.net | IndiaModel.net | KidForum.net | OfficeIndia.net | PaysIndia.com | RestaurantIndia.net | RestaurantsIndia.net | SaleForum.net | SellForum.net | SoldIndia.com | StarIndia.net | TomatoCab.com | TomatoCabs.com | TownIndia.com
Interested to Buy Any Domain ? << Click Here >> for more details...

Implement F = AB+C using CMOS gates?

Answer Posted / radhika

CMOS gate consists of both NMOS and PMOS.
Two NMOS ,a and b are connected in series with each other and their series combination is in parallel with c named nmos.For PMOS ,a and b are connected in parallel with each other and this parallel combination is in series with c named pmos.Output is taken from PMOS and NMOS junction.

Is This Answer Correct ?    1 Yes 3 No



Post New Answer       View All Answers


Please Help Members By Posting Answers For Below Questions

Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers

1116


How does Vbe and Ic change with temperature?

3518


What are the steps required to solve setup and hold violations in vlsi?

1092


Basic Stuff related to Perl?

2824


How logical gates are controlled by boolean logic?

1075


Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

3869


Mention what are the different gates where Boolean logic are applicable?

1133


What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

2442


Explain why present VLSI circuits use MOSFETs instead of BJTs?

1156


Tell me how MOSFET works.

2430


Explain Cross section of an NMOS transistor?

1041


What are the steps involved in designing an optimal pad ring?

1172


What is the difference between cmos and bipolar technologies?

1138


Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

3146


Explain how Verilog is different to normal programming language?

1280