what is the difference between the testing and verification?
- 1 Answers
- 5898 Views
- Intel, I also Faced
- E-Mail Answers
Answer / wilszz
testing is performed on a silicon level after the design is made by foundry. it is chariterization test. However verification is done before tapeout and during the design stage, it mainly has netlist- verification and layout verification
| Is This Answer Correct ? | 3 Yes | 0 No |
What is a D-latch? Write the VHDL Code for it?
Explain Basic Stuff related to Perl?
Differences between blocking and Non-blocking statements in Verilog?
What is Body Effect?
0 Answers CG CoreEL, Cisco, TA,
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
what is Slack?
Insights of a 4bit adder/Sub Circuit?
How do you size NMOS and PMOS transistors to increase the threshold voltage?
Describe the various effects of scaling?
Implement a 2 I/P and gate using Tran gates?
For f = AB+CD if B is S-a-1, what r the test vectors needed to detect the fault?
What types of CMOS memories have you designed? What were their size? Speed?
86 Family 
