Interested to Buy Any Domain ? << Click Here >> for more details...
what is the difference between the testing and verification?
- 1 Answers
- 6846 Views
- Intel, I also Faced
- E-Mail Answers
Answer / wilszz
testing is performed on a silicon level after the design is made by foundry. it is chariterization test. However verification is done before tapeout and during the design stage, it mainly has netlist- verification and layout verification
| Is This Answer Correct ? | 3 Yes | 0 No |
How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?
For CMOS logic, give the various techniques you know to minimize power consumption
What happens when the gate oxide is very thin?
Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
If not into production, how far did you follow the design and why did not you see it into production?
Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
Explain the Charge Sharing problem while sampling data from a Bus?
What is the difference between the mealy and moore state machine?
Give the expression for CMOS switching power dissipation?
2 Answers Cypress Semiconductor,
Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
Are you familiar with the term snooping?
What are set up time & hold time constraints? What do they signify?
86 Family 
