Answer / wilszz

testing is performed on a silicon level after the design is made by foundry. it is chariterization test. However verification is done before tapeout and during the design stage, it mainly has netlist- verification and layout verification 

You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?

0 Answers   Intel,

---

For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

---

What happens if we use an Inverter instead of the Differential Sense Amplifier?

0 Answers   Infosys,

---

Why do we need both PMOS and NMOS transistors to implement a pass gate?

3 Answers   INEL, Intel,

---

What are the different design techniques required to create a layout for digital circuits?

0 Answers  

---

In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

1 Answers   Intel,

---

Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

0 Answers   Intel, Sun Microsystems,

---

Explain how Verilog is different to normal programming language?

0 Answers  

---

What is Fowler-Nordheim Tunneling?

2 Answers   Intel,

---

What is pipelining and how can we increase throughput using pipelining?

1 Answers   Intel,

---

Explain Custom Design Flow?

2 Answers   Intel,

---

What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus

0 Answers   Infosys,

---