What are the different types of skews used in vlsi?

1 Answers  

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What are the different ways in which antenna violation can be prevented?

0 Answers  

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Implement a function with both ratioed and domino logic and merits and demerits of each logic?

0 Answers   Intel,

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Define threshold voltage?

32 Answers   College School Exams Tests, Intel, JHG, Wipro,

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Explain what is slack?

0 Answers  

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What happens if we use an Inverter instead of the Differential Sense Amplifier?

0 Answers  

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Explain why is the number of gate inputs to cmos gates usually limited to four?

0 Answers  

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What happens to delay if you increase load capacitance?

3 Answers   Infosys,

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Explain what is scr (silicon controlled rectifier)?

0 Answers  

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Give the expression for calculating Delay in CMOS circuit?

1 Answers   Infosys,

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How do you size NMOS and PMOS transistors to increase the threshold voltage?

4 Answers  

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Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  

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