Explain the usage of the shared SPI bus?

1 Answers  

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For CMOS logic, give the various techniques you know to minimize power consumption

0 Answers   Infosys,

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What are the different design techniques required to create a layout for digital circuits?

0 Answers  

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Explain various adders and difference between them?

0 Answers   Intel,

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what is Slack?

0 Answers  

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What does it mean “the channel is pinched off”?

0 Answers  

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Explain the working of 4-bit Up/down Counter?

0 Answers   Intel,

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What is the difference between synchronous and asynchronous reset?

0 Answers  

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How does Resistance of the metal lines vary with increasing thickness and increasing length?

3 Answers   Infosys,

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Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  

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what is short Channel effect.

2 Answers  

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Give various factors on which threshold voltage depends.

0 Answers  

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