what is the difference between the testing and verification?
- 1 Answers
- 5912 Views
- Intel, I also Faced
- E-Mail Answers
Answer Posted / wilszz
testing is performed on a silicon level after the design is made by foundry. it is chariterization test. However verification is done before tapeout and during the design stage, it mainly has netlist- verification and layout verification
| Is This Answer Correct ? | 3 Yes | 0 No |
Post New Answer View All Answers
Explain what is Verilog?
What was your role in the silicon evaluation/product ramp? What tools did you use?
Explain the Charge Sharing problem while sampling data from a Bus?
What is the function of enhancement mode transistor?
If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?
What products have you designed which have entered high volume production?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What happens if we use an Inverter instead of the Differential Sense Amplifier?
Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.
What are the different measures that are required to achieve the design for better yield?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
Mention what are the two types of procedural blocks in Verilog?
What are the different classification of the timing control?
Explain what is scr (silicon controlled rectifier)?
what is a sequential circuit?
