Explain the difference between write through and write back cache.

2 Answers   Intel,

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Differences between netlist of HSPICE and Spectre?

1 Answers   Intel,

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How can you model a SRAM at RTL Level?

0 Answers   Infosys,

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How does a pn junction works?

2 Answers   Wipro,

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Are you familiar with VHDL and/or Verilog?

17 Answers   Intel,

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Differences between DRAM and SRAM?

14 Answers   Infosys, Intel, University, Wipro,

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What happens to delay if you increase load capacitance?

3 Answers   Infosys,

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Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?

0 Answers   Intel,

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Explain the various Capacitances associated with a transistor and which one of them is the most prominent?

2 Answers   Intel,

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What happens to delay if you increase load capacitance?

1 Answers   Google,

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What?s the critical path in a SRAM?

2 Answers   Infosys, Intel, Texas,

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,

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