Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?
- 0 Answers
- 887 Views
- Infosys, I also Faced
- E-Mail Answers
Advantages and disadvantages of Mealy and Moore?
Explain how logical gates are controlled by Boolean logic?
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)
How many bit combinations are there in a byte?
What happens if we use an Inverter instead of the Differential Sense Amplifier?
In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?
How do you detect if two 8-bit signals are same?
What products have you designed which have entered high volume production?
Explain the Charge Sharing problem while sampling data from a Bus?
Why don?t we use just one NMOS or PMOS transistor as a transmission gate?
Explain the sizing of the inverter?
86 Family 
