What is setup time and hold time?

1 Answers   Intel,

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You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

0 Answers   Infosys,

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What is the difference between the mealy and moore state machine?

0 Answers  

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Give the expression for calculating Delay in CMOS circuit?

1 Answers   Infosys,

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Explain Custom Design Flow?

2 Answers   Intel,

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Given a circuit and asked to tell the output voltages of that circuit?

1 Answers   Intel, Omega Healthcare,

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What does the above code synthesize to?

0 Answers   Intel,

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Write a pseudo code for sorting the numbers in an array?

2 Answers   Intel,

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How does a pn junction works?

2 Answers   Wipro,

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What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

0 Answers   Intel,

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What are the different design techniques required to create a layout for digital circuits?

0 Answers  

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What happens to delay if we include a resistance at the output of a CMOS circuit?

1 Answers   Infosys,

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