For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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What is a linked list? Explain the 2 fields in a linked list?

1 Answers   Intel,

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what is Early effects and their physical origin.

1 Answers  

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If the current thru the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?

1 Answers   Intel,

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what is the difference between the TTL chips and CMOS chips?

0 Answers  

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What is a D-latch? Write the VHDL Code for it?

3 Answers   Intel,

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Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

0 Answers   Infosys,

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What products have you designed which have entered high volume production?

1 Answers   Intel,

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Explain Clock Skew?

6 Answers   Intel, nvidia,

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Explain the Charge Sharing problem while sampling data from a Bus?

1 Answers  

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What are the total number of lines written by you in C/C++? What compiler was used?

1 Answers   Intel, Zensar,

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If not into production, how far did you follow the design and why did not you see it into production?

1 Answers   Intel,

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