What happens to delay if we include a resistance at the output of a CMOS circuit?

1 Answers   Infosys,

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In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?

0 Answers   Infosys,

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What are the different gates where boolean logic are applicable?

0 Answers  

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Draw the Layout of an Inverter?

0 Answers   Intel,

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What transistor level design tools are you proficient with? What types of designs were they used on?

0 Answers   Intel,

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What are the different classification of the timing control?

0 Answers  

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For f = AB+CD if B is S-a-1, what r the test vectors needed to detect the fault?

5 Answers   Intel,

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Why is OOPS called OOPS? (C++)

1 Answers   ARM, Intel,

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Have you studied buses? What types?

1 Answers   Intel,

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Are you familiar with the term MESI?

0 Answers   Intel,

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Different ways of implementing a comparator?

1 Answers   Intel,

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What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

0 Answers   Intel,

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