What is a D-latch? Write the VHDL Code for it?

3 Answers   Intel,

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Explain sizing of the inverter?

0 Answers   Infosys,

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While using logic design, explain the various steps that r followed to obtain the desirable design in a well defined manner?

1 Answers   Intel,

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Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram

0 Answers   Infosys,

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Tell me how BJT works.

2 Answers  

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What happens when the gate oxide is very thin?

3 Answers   Intel,

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What are the various regions of operation of mosfet? How are those regions used?

0 Answers  

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Explain CMOS Inverter transfer characteristics?

0 Answers   ADS,

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What are the limitations in increasing the power supply to reduce delay?

2 Answers   Infosys,

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Explain what is slack?

0 Answers  

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Are you familiar with VHDL and/or Verilog?

1 Answers   Intel,

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Who provides the DRC rules?

5 Answers   Intel,

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