Draw a 6-T SRAM Cell and explain the Read and Write operations

0 Answers   Infosys,

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Why do we use a Clock tree?

3 Answers   Intel,

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Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?

0 Answers   Infosys,

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Design an 8 is to 3 encoder using 4 is to encoder?

0 Answers   Intel,

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Explain what is slack?

0 Answers  

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Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

0 Answers   Intel, Sun Microsystems,

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What are the ways to Optimize the Performance of a Difference Amplifier?

0 Answers  

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Who provides the DRC rules?

5 Answers   Intel,

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In Verilog code what does “timescale 1 ns/ 1 ps” signifies?

0 Answers  

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What is a D-latch? Write the VHDL Code for it?

3 Answers   Intel,

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What was your role in the silicon evaluation/product ramp? What tools did you use?

0 Answers   Intel,

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Explain Custom Design Flow?

2 Answers   Intel,

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