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Describe a finite state machine that will detect three
consecutive coin tosses (of one coin) that results in
heads.
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What?s the critical path in a SRAM?
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Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
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What are set up time & hold time constraints? What do they signify?
Draw a 6-T SRAM Cell and explain the Read and Write operations
Give the expression for calculating Delay in CMOS circuit?
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