What happens if we delay the enabling of Clock signal?


No Answer is Posted For this Question
Be the First to Post Answer

Post New Answer

More VLSI Interview Questions

what is Slack?

0 Answers  


Explain what is the use of defpararm?

0 Answers  


What transistor level design tools are you proficient with? What types of designs were they used on?

0 Answers   Intel,


What's the price in 1K quantity?

0 Answers   Wipro,


Give the cross-sectional diagram of the cmos.

0 Answers  






Explain the Charge Sharing problem while sampling data from a Bus?

0 Answers  


Insights of an inverter. Explain the working?

1 Answers   Intel,


How to find the read failiure probablity in SRAM?

2 Answers  


In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

1 Answers   Intel,


How does Resistance of the metal lines vary with increasing thickness and increasing length?

3 Answers   Infosys,


What happens to delay if you increase load capacitance?

1 Answers   Google,


Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.

0 Answers   Infosys,


Categories