Answer / kanak

Let's take an example of different processors(along with
their independent caches) sharing the same memory system.

Now if this memory is a Read-Write memory and let's say
that one of the processors writes to this memory after some
data computation, all the processors need to update their
individual cache copies of the now modified memory. To do
this the concept of snooping is implemented. cache snooping
is the means by which each cache constantly
monitors/detects the bus for any write to a memory location
and if a write is found, it invalidates it current copy of
cached memory data and copies the new content over.

What is interrupt latency?

3 Answers  

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what is charge sharing?

0 Answers   Intel,

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Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?

13 Answers   Intel,

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What is validation?

2 Answers   Intel,

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

0 Answers   Infosys,

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0 Answers   Infosys,

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Id vs. Vds Characteristics of NMOS and PMOS transistors?

1 Answers   Brillient, Intel, ISRO,

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Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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Draw the stick diagram of a NOR gate. Optimize it

0 Answers   Infosys,

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Differences between DRAM and SRAM?

14 Answers   Infosys, Intel, University, Wipro,

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Differences between Signals and Variables in VHDL? If the same code is written using Signals and Variables what does it synthesize to?

1 Answers   IIT, Intel,

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