In a SRAM layout, which metal layers would you prefer for
Word Lines and Bit Lines? Why?
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Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)
What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?
What is the mealy and moore machine's state diagram that can detect 3 consecutive heads of 3 coins ?
For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?
Explain the Charge Sharing problem while sampling data from a Bus?
what is the difference between the TTL chips and CMOS chips?
Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
what is multiplexer?
What are the steps involved in preventing the metastability?
what is the doping?
Give the expression for calculating Delay in CMOS circuit?
Are you familiar with VHDL and/or Verilog?