For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?

0 Answers   Intel,

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Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  

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Write a program to explain the comparator?

0 Answers  

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What is a linked list? Explain the 2 fields in a linked list?

1 Answers   Intel,

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what is short Channel effect.

2 Answers  

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How many bit combinations are there in a byte?

6 Answers   Intel,

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For f = AB+CD if B is S-a-1, what r the test vectors needed to detect the fault?

5 Answers   Intel,

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If the current thru the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?

1 Answers   Intel,

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Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)

6 Answers  

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Explain the Charge Sharing problem while sampling data from a Bus?

0 Answers  

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How logical gates are controlled by boolean logic?

0 Answers  

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