What is LVS, DRC?

10 Answers   IBM, Intel,

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Explain what is Verilog?

0 Answers  

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In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

3 Answers   IBM, Intel, nvidia,

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Explain the sizing of the inverter?

1 Answers   Intel,

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Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers

0 Answers   Infosys,

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What does it mean “the channel is pinched off”?

0 Answers  

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what is the difference between the testing and verification?

1 Answers   Intel,

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Write a pseudo code for sorting the numbers in an array?

2 Answers   Intel,

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How to find the read failiure probablity in SRAM?

2 Answers  

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Explain depletion region.

0 Answers  

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,

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What happens if we use an Inverter instead of the Differential Sense Amplifier?

0 Answers  

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