Answer / guest

SPI is a communication module . Shared SPI bus is used in
transferring the data's between processors in a dual core
system

Give the expression for calculating Delay in CMOS circuit?

1 Answers   Infosys,

---

Explain the sizing of the inverter?

1 Answers   Intel,

---

What types of CMOS memories have you designed? What were their size? Speed?

0 Answers   e-tec, Intel,

---

What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).

4 Answers   Analog Devices,

---

Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

0 Answers  

---

What happens to delay if we include a resistance at the output of a CMOS circuit?

1 Answers   Infosys,

---

Differences between Array and Booth Multipliers?

0 Answers   Intel,

---

What is LVS, DRC?

10 Answers   IBM, Intel,

---

Explain the Charge Sharing problem while sampling data from a Bus?

0 Answers  

---

What are the steps involved in designing an optimal pad ring?

0 Answers  

---

Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

---

What are the main issues associated with multiprocessor caches and how might you solve them?

0 Answers   Intel,

---