Answer / girish

Apply kvl to ce loop
Vcc=IcRc+Vo
when Ib increases, Ic=beta x Ib increases which increses
IcRc.
therefore Vo decreses to as Vcc is constant..
Thus when Ib is increasing(Positive half cycle) output
decreses(goes negative) and when Ib decreses output V0
increses..producing 180 phase shift between input and output

Answer / nandu202

Before reading my answer,i ask u 2 refer transistor biasing
circuit.

If u look at the o/p:
o/p eqn. can be written as:
Vce=Vcc-(Ic*Re);

As i/p increases,Ib(which wil b the i/p in CE Mode wil
increase so Ic increases so drop across Re increases
resulting in decreased Vce.

If u take a sinusoidal i/p,Correspondingly u add all d
points u wil get a 180 phase shift

Answer / himanshu

see ans in book

Answer / sana

as Vo=Vcc-IcRc
Vcc= constant so we can say that Vo iz directly proportional to IcRc. now when Vb(base voltage) increase Ib increase so Ic increase and voltage drop across Rc increase so Vo decrease....... producing 180 phase shift

Answer / jyothish

In CE configuration we are plotting the output graph currosponding to the input current Ib. So if the input current increases it increases the collector current Ic. But increase in Ic reduces the voltage drop across the collector and emitter terminals(Vce). So at increased input current a reduced output voltage is occured. So output has 180 Degree phase shift.

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