what happens to delay if we include a resistance at the output of a cmos circuit

what happens to delay if we include a resistance at the output of a cmos circuit.expalin it clearly

Question Posted / bindu

0 Answers
1666 Views
I also Faced
E-Mail Answers

No Answer is Posted For this Question
Be the First to Post Answer

More Electronics Communications Interview Questions

i/p sec of atransformer is 230V 5a o/p spc is 12v 1a so i/p power will be 1150w o/p power will be 12w then how the power transfer theorm matching with this??

2 Answers Bosch, Surya Software,

draw a ckt diagram i/p 230v & o/p 80v??????

0 Answers CMC,

why should i hire u?

4 Answers Wipro,

What is meant by pwm control?

0 Answers

I've finished b tech in electronics and communication engg.Can i appaer for the nic exam

0 Answers

What is meant by virtual ground in the op amp ?

15 Answers TCS,

why is 555 timer called so?

15 Answers

what type of quesions asks in interview?

0 Answers TCS,

in microcontroller why processor is used why not controller?

3 Answers Infosys,

what is the use of FR-4(flame retardant)in PCB design why dielectric material used in inner layer in PCB design technology??

0 Answers CoreEL,

minimum,maximum values of s12 in lossless & lossy txline?

0 Answers Bosch,

what is mean by semiconductor?& what is mean by electronics?

5 Answers HCL, TCS,

For more Electronics Communications Interview Questions Click Here