86 Family (470)
VLSI (297)
DSP (55)
Embedded Systems AllOther (399) If a1M1× DRAM requires 4 ms for a refresh and has 256 rows to be refreshed, no more than __________ of time must pass before another row is refreshed.
CDAC,
1265In which T-state does the CPU sends the address o memory or I/O and the ALE signal for Demultiplexing
CDAC,
1498What number of the times the instruction sequence below will loop before coming out of loop is MOV AL, 00hA1: INC AL JNZ A1
CDAC,
1417
What is the purpose of the segment register?
What are the rules followed by mutexes?
What is null pointer and what is its use?
State the differences between absolute and linear select decosing.
What is continuous integration? Why is it important?
why is the number of gate inputs to CMOS gates usually limited to four?
If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?
Mention interrupts pins of 8085?
Explain me why is model transformations used in the embedded system?
Name the unit that controls the sequential execution of instructions?
What is threshold voltage?
What is the function of enhancement mode transistor?
Define edge or level sensitive interrupts?
Explain the internal architecture of the 8086 microprocessor?
What is the function of dma controlled in embedded system?