86 Family (470)
VLSI (297)
DSP (55)
Embedded Systems AllOther (399) If a1M1× DRAM requires 4 ms for a refresh and has 256 rows to be refreshed, no more than __________ of time must pass before another row is refreshed.
CDAC,
1327In which T-state does the CPU sends the address o memory or I/O and the ALE signal for Demultiplexing
CDAC,
1535What number of the times the instruction sequence below will loop before coming out of loop is MOV AL, 00hA1: INC AL JNZ A1
CDAC,
1468
Explain Cross section of a PMOS transistor?
Tell me what is null pointer and what is its use?
Write the properties of linear convolution.
Tell me what are the commonly found errors in embedded systems?
What are the types of interrupts in 8051?
What is Nyquist rate?
How might a task-based model differ from a threaded model?
What is equ?
How logical gates are controlled by boolean logic?
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Which bit of the flag register is set when output overflows to the sign bit?
What happens if we delay the enabling of Clock signal?
what is embedded system in a computer system?
Explain the operation of a 6T-SRAM cell?