Interested to Buy Any Domain ? << Click Here >> for more details...
Why do we need both PMOS and NMOS transistors to implement a
pass gate?
- 3 Answers
- 14828 Views
- INEL, Intel, I also Faced
- E-Mail Answers
Answer Posted / akshay aggarwal
nmos output is inverted.for eg.-
if we have to make y=a+b
we will design it using nmos....but we get the output
ybar = a + b
to get y instead of ybar we use a complementary pmos circuit
| Is This Answer Correct ? | 1 Yes | 6 No |
Post New Answer View All Answers
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?
Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
Explain Cross section of a PMOS transistor?
Implement a 2 I/P and gate using Tran gates?
Insights of a 4bit adder/Sub Circuit?
What are the ways to Optimize the Performance of a Difference Amplifier?
What types of high speed CMOS circuits have you designed?
Differences between Array and Booth Multipliers?
what is the use of defpararm?
How does Vbe and Ic change with temperature?
For CMOS logic, give the various techniques you know to minimize power consumption
Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.
Mention what are the different gates where Boolean logic are applicable?
