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Embedded Systems AllOther Interview Questions
Questions Answers Views Company eMail

What is the repository pattern? Why are patterns important?

930

Can you have constant volatile variables?

825

How can you reduce interrupt latency?

817

Explain the differences between analytical and computational modeling?

970

How do the mvp, mvc, and mvvm patterns relate?

815

What buses are used for communication in embedded system?

884

What are the qualifiers in c?

882

Discuss the concept of yagni.

913

What are the advantages and disadvantages of separation of concerns?

854

What type of scheduling is there in rtos?

927

How to reduce interrupt latency?

945

What is refactoring? Name three common refactorings.

1156

What is the difference between unit test and integration test?

944

Explain the difference between "set" logic, and "procedural" logic.

943

Explain the difference between risc and cisc processor?

933


Post New Embedded Systems AllOther Questions

Un-Answered Questions { Embedded Systems AllOther }

Which is the best way to write loops?

933


Please explain can structures be passed to the functions by value?

834


Scope of static variables?

954


What is the difference between testing and verification?

1019


Tell me why does pre-emptive multi-threading used to solve the central controller problem?

901


Why is it better to use multi-threading polling then single threading model?

927


What is endianness of a system and how do different systems communicate with each other?

900


Would you call yourself a craftsman (craftsperson) and what does that word mean to you?

904


Differentiate testing and verification?

968


Tell me what happens when recursive functions are declared inline?

949


What software languages have you used to design, develop, and debug software application interfaces?

924


What are the uses of the keyword static?

906


This program is in verilog and need help to get it working correctly. This is the code i have so far. Please help. Simple testbench would be great. Thanks\ 'define vend_a_drink {D,dispense,collect} = {IDLE,2'b11}; module drink_machine(nickel_in, dime_in, quarter_in, collect, nickel_out, dime_out, dispense, reset, clk) ; parameter IDLE=0,FIVE=1,TEN=2,TWENTY_FIVE=3, FIFTEEN=4,THIRTY=5,TWENTY=6,OWE_DIME=7; input nickel_in, dime_in, quarter_in, reset, clk; output collect, nickel_out, dime_out, dispense; reg collect, nickel_out, dime_out, dispense; reg [2:0] D, Q; /* state */ // synopsys state_vector Q always @ ( nickel_in or dime_in or quarter_in or reset ) begin nickel_out = 0; dime_out = 0; dispense = 0; collect = 0; if ( reset ) D = IDLE; else begin D = Q; case ( Q ) IDLE: if (nickel_in) D = FIVE; else if (dime_in) D = TEN; else if (quarter_in) D = TWENTY_FIVE; FIVE: if(nickel_in) D = TEN; else if (dime_in) D = FIFTEEN; else if (quarter_in) D = THIRTY; TEN: if (nickel_in) D = FIFTEEN; else if (dime_in) D = TWENTY; else if (quarter_in) 'vend_a_drink; TWENTY_FIVE: if( nickel_in) D = THIRTY; else if (dime_in) 'vend_a_drink; else if (quarter_in) begin 'vend_a_drink; nickel_out = 1; dime_out = 1; end FIFTEEN: if (nickel_in) D = TWENTY; else if (dime_in) D = TWENTY_FIVE; else if (quarter_in) begin 'vend_a_drink; nickel_out = 1; end THIRTY: if (nickel_in) 'vend_a_drink; else if (dime_in) begin 'vend_a_drink; nickel_out = 1; end else if (quarter_in) begin 'vend_a_drink; dime_out = 1; D = OWE_DIME; end TWENTY: if (nickel_in) D = TWENTY_FIVE; else if (dime_in) D = THIRTY; else if (quarter_in) begin 'vend_a_drink; dime_out = 1; end OWE_DIME: begin dime_out = 1; D = IDLE; end endcase end end always @ (posedge clk ) begin Q = D; end endmodule

3451


What is meant by a sandbox, why you would use one.

904


Discuss the concept of yagni.

913