Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.
1253Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
1257Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?
1184Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?
1203Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
1720You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other
1621What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
1426How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?
1251For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
1348Post New Infosys Interview Questions
Mention the validation tools used in SAS?
Explain inductance?
what are the different levels of database schema?
What is Drupal blocks?
How familiar are you with crm?
What are the advantages of interface in c#?
Explain the concepts of "$ function" in jquery with an example?
What is a linux process?
What is the maximum byte-size for a push notification to apple server?
Mention how many relationship is included in sfdc and what are they?
What will happen if the armature resistance is in minimum position and the field resistance is in maximum position while starting the motor
Donnan's equilibrium?
What is advice?
Where are table tools in word 2016?
What is the difference between kernels, support packages & sap note?