Interested to Buy Any Domain ? << Click Here >> for more details...
What happens to delay if you increase load capacitance?
- 1 Answers
- 3658 Views
- Google, I also Faced
- E-Mail Answers
Answer Posted / shashank agarwal
Since delay=f*C*Vdd^2, delay increases with the increase in the load capacitance
| Is This Answer Correct ? | 1 Yes | 1 No |
Post New Answer View All Answers
Draw the stick diagram of a NOR gate. Optimize it
What are the ways to Optimize the Performance of a Difference Amplifier?
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
Write a VLSI program that implements a toll booth controller?
Explain the three regions of operation of a mosfet.
What happens if we delay the enabling of Clock signal?
For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD
Explain sizing of the inverter?
Explain the operation considering a two processor computer system with a cache for each processor.
Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?
Explain the operation of a 6T-SRAM cell?
Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
Explain Cross section of a PMOS transistor?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
what is multiplexer?
