What happens to delay if you increase load capacitance?
Answer Posted / arpan
If load capacitance is increased then time require to charge
the capacitance increases, so the rise time increases which
in turn increases the delay.
| Is This Answer Correct ? | 7 Yes | 1 No |
Post New Answer View All Answers
what is Slack?
Explain what is slack?
what is the difference between the TTL chips and CMOS chips?
What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
What are the different design constraints occur in the synthesis phase?
Explain why is the number of gate inputs to cmos gates usually limited to four?
What are the steps involved in preventing the metastability?
Why does the present vlsi circuits use mosfets instead of bjts?
Differences between IRSIM and SPICE?
What types of CMOS memories have you designed? What were their size? Speed?
Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
Explain the operation considering a two processor computer system with a cache for each processor.
Are you familiar with the term snooping?
What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
What does it mean “the channel is pinched off”?