Give the expression for CMOS switching power dissipation?
Answer Posted / arpan
P=CL * Vdd^2 * f
CL= Load capacitance
VDD = Supply Voltage
f= Switching frequency
During high to low transition the load
capacitance is discharged and during low to high transition
the load capacitance is charged.
| Is This Answer Correct ? | 7 Yes | 0 No |
Post New Answer View All Answers
How do you size NMOS and PMOS transistors to increase the threshold voltage?
Explain how Verilog is different to normal programming language?
What transistor level design tools are you proficient with? What types of designs were they used on?
Basic Stuff related to Perl?
Draw a CMOS Inverter. Explain its transfer characteristics
What is the critical path in a SRAM?
Mention what are the two types of procedural blocks in Verilog?
What transistor level design tools are you proficient with? What types of designs were they used on?
How can you construct both PMOS and NMOS on a single substrate?
What is the difference between cmos and bipolar technologies?
Explain the operation of a 6T-SRAM cell?
Write a program to explain the comparator?
Cross section of a PMOS transistor?
How to improve these parameters? (Cascode topology, use long channel transistors)
Explain Cross section of a PMOS transistor?