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What happens if we delay the enabling of Clock signal?
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Draw the stick diagram of a NOR gate. Optimize it
If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?
What happens if we use an Inverter instead of the Differential Sense Amplifier?
Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
Explain Cross section of an NMOS transistor?
What is the difference between the mealy and moore state machine?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Are you familiar with the term MESI?
In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?
For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?
Explain the Charge Sharing problem while sampling data from a Bus?
Differences between IRSIM and SPICE?
Implement a function with both ratioes and domino logic and merits and demerits of each logic?
Explain how binary number can give a signal or convert into a digital signal?
If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?
