Golgappa.net | Golgappa.org | BagIndia.net | BodyIndia.Com | CabIndia.net | CarsBikes.net | CarsBikes.org | CashIndia.net | ConsumerIndia.net | CookingIndia.net | DataIndia.net | DealIndia.net | EmailIndia.net | FirstTablet.com | FirstTourist.com | ForsaleIndia.net | IndiaBody.Com | IndiaCab.net | IndiaCash.net | IndiaModel.net | KidForum.net | OfficeIndia.net | PaysIndia.com | RestaurantIndia.net | RestaurantsIndia.net | SaleForum.net | SellForum.net | SoldIndia.com | StarIndia.net | TomatoCab.com | TomatoCabs.com | TownIndia.com
Interested to Buy Any Domain ? << Click Here >> for more details...

What is clock feed through?

Answer Posted / sunil b r

he accumulation of a small positive charge on the source of
a MOS switch which occurs after the switch has been turned
off due to the parasitic capacitance that exists between the
gate and the source of the transistor, known as clock
feedthrough, is reduced by utilizing a split-gate MOS
transistor, and by continuously biasing one of the gates of
the split-gate transistor.

Is This Answer Correct ?    25 Yes 3 No



Post New Answer       View All Answers


Please Help Members By Posting Answers For Below Questions

Tell me how MOSFET works.

2387


What was your role in the silicon evaluation or product ramp? What tools did you use?

2277


What types of high speed CMOS circuits have you designed?

2545


Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

1416


What are the different classification of the timing control?

1076


For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

2366


Design an 8 is to 3 encoder using 4 is to encoder?

1308


Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

1034


What are the changes that are provided to meet design power targets?

1074


What is the difference between synchronous and asynchronous reset?

1063


Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?

1101


How can you model a SRAM at RTL Level?

5702


How does a Bandgap Voltage reference work?

3871


What is look up table in vlsi?

953


What is Body Effect?

2479