what is the difference between the TTL chips and CMOS chips?
what is verilog?
What are the different gates where boolean logic are applicable?
Explain why is the number of gate inputs to cmos gates usually limited to four?
Why does the present vlsi circuits use mosfets instead of bjts?
What is the main function of metastability in vsdl?
What is the function of tie-high and tie-low cells?
What are the different design constraints occur in the synthesis phase?
What are the steps involved in preventing the metastability?
What are the changes that are provided to meet design power targets?
What are the various regions of operation of mosfet? How are those regions used?
Explain what is the depletion region?
What are the steps required to solve setup and hold violations in vlsi?
What are the different ways in which antenna violation can be prevented?
Explain depletion region.
