Which gate is normally preferred while implementing circuits
using CMOS logic, NAND or NOR? Why?
Answer Posted / naseemuddin ansari
NAAND gate is more preferred than NOR because high to low
and low to high transition time is less in NAND as compared
to NOR
| Is This Answer Correct ? | 25 Yes | 3 No |
Post New Answer View All Answers
How does a Bandgap Voltage reference work?
Explain the Charge Sharing problem while sampling data from a Bus?
Draw a CMOS Inverter. Explain its transfer characteristics
Are you familiar with the term snooping?
what is the use of defpararm?
Explain Cross section of a PMOS transistor?
How logical gates are controlled by boolean logic?
Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
What are the ways to Optimize the Performance of a Difference Amplifier?
Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)
How do you size NMOS and PMOS transistors to increase the threshold voltage?
What transistor level design tools are you proficient with? What types of designs were they used on?
What is the function of enhancement mode transistor?
You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other
Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?