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Foundry people provide DRC rules
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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Give various factors on which threshold voltage depends.
Explain the working of Insights of an inverter ?
What does it mean “the channel is pinched off”?
Are you familiar with the term snooping?
Explain what is Verilog?
Explain how logical gates are controlled by Boolean logic?
what are three regions of operation of MOSFET and how are they used?
what is multiplexer?
Differences between Array and Booth Multipliers?
What is the function of tie-high and tie-low cells?
Draw a CMOS Inverter. Explain its transfer characteristics
What does the above code synthesize to?
Mention what are three regions of operation of mosfet and how are they used?
