Will The Rated Capacity of 20 MVA ,220/6.6 KV, ONAN
cooling Power Tranformer be increased up to 25 MVA with
respect to its %Impedence by ONAF cooling with same
rating..?
Answer Posted / guest
Above Transformer with same electrical parameter will have
higher capacity when its cooling system provided with ONAF
upon ONAN cooling System. As well as its %Impedence will be
also increased as accordingly.
| Is This Answer Correct ? | 2 Yes | 3 No |
Post New Answer View All Answers
Why using synchronising methed in DG's sets?
What is vaccum currcuit breaker.define with cause and where be use it device?
How the PF control while running DG set with load
What is critical disruptive voltage?
HOW TO CALCULATE CAPACITOR BANK OR HARMONIC FILTER CALCULATION
Explain what are inter-poles and why they are required in a dc machine.
Draw a block diagramof Three UPS systems connected in Parallel mode?
any body,pls tell me how to done relay coordination ? how to coordinate by TCC curve?how to read the tcc curve?
3 shows a 415 V, 3-phase generator supplying a 3-phase 415/110 V transformer. Draw the individual and combined impedance diagrams to a base of 10 kVA. Determine the system fault kVA and the fault currents at the 415 V and 110 V busbars for short circuit faults on the transformer input or output terminals. Work in p.u. values of impedances.
If we impress a dc voltage of 230 V on an unloaded 230 V, 50 Hz transformer it wi A give high secondary voltage B burn out C give secondary voltage as per K D none of these
Can 4pole (3 phase+neautral )RCCB proper functioning in only 3 phase load (no neautral, no Earth) ?
how did i get the competency certificate as electricle supervisor. iam completed my b.tech.but i dnt have any experince, this certificate is required for applyng ongc mangement trainees. what should i do sir please suggested me
What is mean 2XWY
What is the role of feedback in a closed loop control system?
Is there a possibility to use such a treshold voltage for the NMOS part of a CMOS circuit that during the switching it will start conducting only after the PMOS part will be already closed, by this eliminating the leakedge current? Please note, I'm not asking about the well bias in standby mode, but about the "antileakedge" measures during normal operation.