Answer Posted / chandrasekar

In a J-K flip flop. When j=k=1
and clock is applied,the
output go on complementing
every delay time of flip flop as
long as block is present.
Therefore the output at the
end of the clock pulse is
ambiguous. This condition is
known as race around
condition.



Master slave flip flop is a
cascade me two flip flop in
which the first one responds
to the data input when the
block is high,whereas the
second one responds to the
output of the first one when
the clock is low. Thus the final
output change only when the
clock is low when the data
inputs are not effective. Thus
the race-around condition
gets eliminated in this.

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