Interested to Buy Any Domain ? << Click Here >> for more details...
Which gate is normally preferred while implementing circuits
using CMOS logic, NAND or NOR? Why?
- 13 Answers
- 37837 Views
- Intel, I also Faced
- E-Mail Answers
Answer Posted / pavan kumar gunda
NAND IS PREFERD BECOZ OF ITS HIGH DRIVING CAPACITY....
| Is This Answer Correct ? | 6 Yes | 6 No |
Post New Answer View All Answers
Basic Stuff related to Perl?
What transistor level design tools are you proficient with? What types of designs were they used on?
What types of high speed CMOS circuits have you designed?
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
How can you construct both PMOS and NMOS on a single substrate?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.
What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
What is the ideal input and output resistance of a current source?
What happens if we use an Inverter instead of the Differential Sense Amplifier?
In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?
Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)
Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.
What are the Factors affecting Power Consumption on a chip?
What types of CMOS memories have you designed? What were their size? Speed?
Explain how binary number can give a signal or convert into a digital signal?
