Golgappa.net | Golgappa.org | BagIndia.net | BodyIndia.Com | CabIndia.net | CarsBikes.net | CarsBikes.org | CashIndia.net | ConsumerIndia.net | CookingIndia.net | DataIndia.net | DealIndia.net | EmailIndia.net | FirstTablet.com | FirstTourist.com | ForsaleIndia.net | IndiaBody.Com | IndiaCab.net | IndiaCash.net | IndiaModel.net | KidForum.net | OfficeIndia.net | PaysIndia.com | RestaurantIndia.net | RestaurantsIndia.net | SaleForum.net | SellForum.net | SoldIndia.com | StarIndia.net | TomatoCab.com | TomatoCabs.com | TownIndia.com
Interested to Buy Any Domain ? << Click Here >> for more details...

Which gate is normally preferred while implementing circuits
using CMOS logic, NAND or NOR? Why?

Answer Posted / rajashekar @ nitt

nand gate is preferred because it has high driving
capacity.

Is This Answer Correct ?    12 Yes 2 No



Post New Answer       View All Answers


Please Help Members By Posting Answers For Below Questions

Explain various adders and difference between them?

1217


Explain what is the depletion region?

1091


Explain the working of Insights of a pass gate ?

1240


Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)

1372


What are the changes that are provided to meet design power targets?

1122


Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

3871


Explain Basic Stuff related to Perl?

1052


Differences between Array and Booth Multipliers?

4084


Explain the Various steps in Synthesis?

3283


What is Noise Margin? Explain the procedure to determine Noise Margin?

2464


Draw the stick diagram of a NOR gate. Optimize it

1295


Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

2337


What happens if we use an Inverter instead of the Differential Sense Amplifier?

3316


What types of high speed CMOS circuits have you designed?

2577


Explain depletion region.

1045