If a1M1× DRAM requires 4 ms for a refresh and has 256 rows to be refreshed, no more than __________ of time must pass before another row is refreshed.

1263

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What is 8251?

1114

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In which T-state does the CPU sends the address o memory or I/O and the ALE signal for Demultiplexing

1496

---

Where the data is transferred in a DMA write operation?

1107

---

What is the bit size of Itanium processor of Intel?

1035

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If the crystal oscillator is operating at 15 MHz. What will be the PCLK output of 8284?

1685

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What number of the times the instruction sequence below will loop before coming out of loop is MOV AL, 00hA1: INC AL JNZ A1

1417

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In the instruction FADD, What does F stands for

1194

---

In case of DVD, the speed is referred in terms of n X. Here what does X refers to

1033

---

The Pentium microprocessor has how many execution unit?

1085

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What does 8088 microprocessor have?

986

---

When is the LOCK prefix used often?

1077

---

Can you name the different types of processor?

1090

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What is clock frequency for 8085?

1009

---

What is line of sight?

884

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