Explain Cross section of an NMOS transistor?
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
Draw the SRAM Write Circuitry
What is Body Effect?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Explain about 6-T XOR gate?
Explain CMOS Inverter transfer characteristics?
What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
Explain depletion region.
Implement a 2 I/P and gate using Tran gates?
Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
Explain sizing of the inverter?
Explain how MOSFET works?
In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?
Are you familiar with the term MESI?