Describe the various effects of scaling?

4329

What are the main issues associated with multiprocessor caches and how might you solve them?

1756

Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

1073

What was your role in the silicon evaluation/product ramp? What tools did you use?

3228

You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

1003

Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers

652

Explain what is scr (silicon controlled rectifier)?

629

What is threshold voltage?

703

What is the difference between the mealy and moore state machine?

606

Differences between IRSIM and SPICE?

4965

Explain the working of Insights of a pass gate ?

686

You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?

2205

Explain what is Verilog?

650

Explain what is slack?

655

For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

960