VLSI Interview Questions, Answers for Freshers and Experienced asked in various Company Job Interviews

VLSI Interview Questions

Questions Answers Views Company eMail

What are the Factors affecting Power Consumption on a chip?

Intel,

1288

Explain various adders and difference between them?

Intel,

1220

For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?

Intel,

1259

Implement a function with both ratioes and domino logic and merits and demerits of each logic?

Intel,

1204

Explain the working of Insights of a pass gate ?

Intel,

1241

Explain the Working of a 2-stage OPAMP?

Intel,

1198

Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers

Infosys,

1116

Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)

Infosys,

1373

In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?

Infosys,

1198

Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.

Infosys,

1213

Draw the stick diagram of a NOR gate. Optimize it

Infosys,

1295

Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)

Infosys,

1206

Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?

Infosys,

1135

Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.

Infosys,

1121

Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?

Infosys,

1151

Post New VLSI Questions

Un-Answered Questions { VLSI }

What was your role in the silicon evaluation or product ramp? What tools did you use?

2336

How do you size NMOS and PMOS transistors to increase the threshold voltage?

3035

Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times

1668

What are the steps involved in designing an optimal pad ring?

1175

How does Vbe and Ic change with temperature?

3521

Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

1089

What is the function of chain reordering?

1079

Draw the SRAM Write Circuitry

1203

How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

1211

Basic Stuff related to Perl?

2831

What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?

1348

In vlsi chip 1000s of transistors are dropped, specifically categorized. Which method is used to achieve this & how it is done practically?

1021

Describe the various effects of scaling?

4796

You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?

2676

Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram

1485

For More Un-Answered { VLSI } Questions Click Here