Interested to Buy Any Domain ? << Click Here >> for more details...
WHAT IS THE DIFFERENCE BETWEEN TESTING AND VERIFICATION OF
VLSI CIRCUIT?
- 5 Answers
- 26815 Views
- Intel, Wipro, I also Faced
- E-Mail Answers
Answer Posted / sriya
verification is used to check the validity of the design
& testing is used for the verification device.
| Is This Answer Correct ? | 4 Yes | 14 No |
Post New Answer View All Answers
Explain what is the depletion region?
what is a sequential circuit?
What are the changes that are provided to meet design power targets?
In Verilog code what does “timescale 1 ns/ 1 ps” signifies?
What does the above code synthesize to?
Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?
You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other
For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD
What is the difference between nmos and pmos technologies?
What transistor level design tools are you proficient with? What types of designs were they used on?
What are the different design constraints occur in the synthesis phase?
Explain the working of Insights of a pass gate ?
Differences between Array and Booth Multipliers?
Explain CMOS Inverter transfer characteristics?
Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;
