What is the function of enhancement mode transistor?

0 Answers  

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Basic Stuff related to Perl?

0 Answers   Intel,

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What?s the critical path in a SRAM?

2 Answers   Infosys, Intel, Texas,

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You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

0 Answers   Infosys,

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What's the price in 1K quantity?

0 Answers   Wipro,

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Differences between D-Latch and D flip-flop?

17 Answers   AIT, Intel, Sibridge Technologies,

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Draw the SRAM Write Circuitry

0 Answers   Infosys,

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What is the function of chain reordering?

0 Answers  

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what is SCR (Silicon Controlled Rectifier)?

0 Answers  

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Explain what is scr (silicon controlled rectifier)?

0 Answers  

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Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

0 Answers  

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WHAT IS THE DIFFERENCE BETWEEN TESTING AND VERIFICATION OF VLSI CIRCUIT?

5 Answers   Intel, Wipro,

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