Explain about stuck at fault models, scan design, BIST and IDDQ testing?

3 Answers   Intel,

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What is a D-latch? Write the VHDL Code for it?

3 Answers   Intel,

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What is look up table in vlsi?

0 Answers  

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What is interrupt latency?

3 Answers  

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What was your role in the silicon evaluation/product ramp? What tools did you use?

0 Answers   Intel,

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Explain the Charge Sharing problem while sampling data from a Bus?

1 Answers  

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What is pipelining and how can we increase throughput using pipelining?

1 Answers   Intel,

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What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus

0 Answers   Infosys,

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Differences between DRAM and SRAM?

14 Answers   Infosys, Intel, University, Wipro,

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What is clock feed through?

2 Answers   Intel,

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why is the number of gate inputs to CMOS gates usually limited to four?

0 Answers  

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What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).

4 Answers   Analog Devices,

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