Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram

0 Answers   Infosys,

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What is Noise Margin? Explain the procedure to determine Noise Margin?

4 Answers   Amkor, Cisco, Infosys, Intel,

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What are the ways to Optimize the Performance of a Difference Amplifier?

0 Answers  

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Differences between D-Latch and D flip-flop?

17 Answers   AIT, Intel, Sibridge Technologies,

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what is the difference between the TTL chips and CMOS chips?

0 Answers  

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If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?

0 Answers   Intel,

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What are the different measures that are required to achieve the design for better yield?

0 Answers  

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Why don?t we use just one NMOS or PMOS transistor as a transmission gate?

2 Answers   Infosys,

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Differences between netlist of HSPICE and Spectre?

1 Answers   Intel,

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If not into production, how far did you follow the design and why did not you see it into production?

0 Answers   Intel,

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Explain the various Capacitances associated with a transistor and which one of them is the most prominent?

2 Answers   Intel,

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Explain the sizing of the inverter?

1 Answers   Intel,

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