Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
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Tell me how MOSFET works.
what is the doping?
Draw the Differential Sense Amplifier and explain its working. Any idea how to size this circuit? (Consider Channel Length Modulation)
If not into production, how far did you follow the design and why did not you see it into production?
Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?
What happens if we delay the enabling of Clock signal?
For a 0.18um and 0.8um technology MOSFET, which has a higher cutoff frequency?
What are the changes that are provided to meet design power targets?
What is the depletion region?
Differences between blocking and Non-blocking statements in Verilog?
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
Explain what is the use of defpararm?