for serially arriving stream:
use a 2 bit accumulator( S1 and S2) with outputs O1 and O2.
Final Output will be Y = ~O1 . O2
For parallel,
use combinational logic , probably priority encoder to
reduce delay.
Step 1: Store the 8 bit value in a accumulator
Step 2: Store 0x1 in a register0, initialize two counter
with 0 i.e. store zero in a reg1 and reg2.
LOOP:
Step 3: Check if AND operation between the value in
register0 and accumulator is set i.e. 1
if yes, increment reg1 and reg2
If no, increment only reg2
step 4: Left shift the value of register0 by 1
step 5: if ( reg2 >=8), exit LOOP
if ( reg1 >= 3), show that 3 bit is set
Else Go To LOOP
MOV XAR1, #Data
MOV XAR0, #0
MOV XAR2, #0
Loop:
TBIT *XAR1, #Count
BF Loop1, NTC
INR *XAR0
Loop1:
INR *XAR2
MOV AL, *XAR1
CMP AL, #0x03
BF Loop3, EQ
MOV AL, *XAR2
CMP AL, #0x80
BF Loop, NEQ
Loop3:
EXIT
Use a 8 bit parallel in serial out shift register. Use the
serial out bit to increment a counter(a 3 bit register), if
its one. After 8 shifts, compare the counter with 011b to
detect 3.
The first guy's got it write, every other answer is more
complicated than needed. Also, we cannot use a 3-input AND
like the second guy said b/c we are given 8 bits, not 3. A
3-bit adder and a comparator is all you need.
In 8085 microprocessor READY signal does.which of the
following is incorrect statements
[a]It is input to the microprocessor
[b] It sequences the instructions