Explain Cross section of a PMOS transistor?

0 Answers   Intel,

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What are the different measures that are required to achieve the design for better yield?

0 Answers  

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Explain the Charge Sharing problem while sampling data from a Bus?

0 Answers  

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Explain what is the depletion region?

0 Answers  

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Explain how logical gates are controlled by Boolean logic?

0 Answers  

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For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?

0 Answers   Intel,

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What types of high speed CMOS circuits have you designed?

0 Answers   Intel,

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Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)

6 Answers  

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How does a Bandgap Voltage reference work?

0 Answers  

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Different ways of implementing a comparator?

1 Answers   Intel,

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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Explain the Working of a 2-stage OPAMP?

0 Answers   Intel,

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