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Genpact Interview Questions
Questions Answers Views Company eMail

why did you want tojoin the call center?

25 46601

how to introduce ourselves

35 62407

what prompted you apply for his job

1 17848

why bpo

22 136836

IIS Migration ?

1870

What is the difference between income year, financial year and FBT year?

10 41485

tell me about ur favourite colour

50 521146

How long do you want stay in US?

11 17515

what is difference between ERP AND SAP

58 119880

create a slide show

1 3345

HR ROUNDS

1 7200

Who is the father of PHP and explain the changes in PHP versions?

15 30356

What is Normalization ?

55 73822

The most literate Union Territory in India is A. Delhi B. Pondicherry C. Chandigarh D. Lakshdweep

6 16978

If u don't have any Knowledge on perticular application but they give that application to u for Testing ? Then How we wil move towards testing on that application?

16 18132

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Un-Answered Questions

What do you understand by the cashless economy?Does it have any pros and cons?

653


Qatar petroleum will call me for an technical phone interview as safety officer Please let me know what kind of question they asked ? any idea about this written test ?

6014


What is an example of a web server?

580


How can I learn python?

439


Explain the 3 types of properties in c# with an example?

547






What do you mean by script?

453


what do you mean by a upgrade set in vsam?

643


What is "per call" instance mode in wcf?

485


How can Configure the SSP in SP 2010?

456


What is crash?

571


You wan to make a user/ vendor a valid part of srm. How will you do that? Does this need anything particular to be done?

472


Why is top management commitment necessary for the success of erp?

555


describe your hobbies.

720


What is Office 365 groups?

457


Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

1060